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1 may 1997 ml2340 * , ML2350 ** single supply, programmable 8-bit d/a converters general description the ml2340 and ML2350 are cmos voltage output, 8-bit d/a converters with an internal voltage reference and a p interface. these devices are designed to be powered by a single supply , although they can be po wered from dual power supplies. the output voltage swings above zero scale (v zs ) in the unipolar mode or around zero scale (v zs ) in the bipolar mode, both with programmable gain. v zs can be set to an y v oltage from a gnd to 2.25v belo w v cc . t he digital and analog grounds, dgnd and a gnd , are totally independent of eac h other . dgnd can be set to an y v oltage from a gnd to 4.5v belo w v cc for easy interfacing to standard ttl and cmos logic families. the high level of integration and versatility of the ml2340 and ML2350 makes them ideal for a wide range of applications in hard disk drives, automotive, telecom, and a variety of general purpose industrial uses. one specific intended application is controlling a hard disk voice coil. the internal reference of the ml2340 provides a 2.25v or 4.50v output for use with a/d conv erters that use a single 5v 10% po wer supply , w hile the ML2350 pro vide a 2.50v or 5.00v reference output. fea tures n programmable output voltage gain settings of 2, 1, 1 / 2 , 1 / 4 pro vide 8-, 9-, 10-, or 11-bit effecti v e resolution around zero n agnd to v cc output voltage swing n bipolar or unipolar output voltage n 4.5v to 13.2v single supply or 2.25v to 6.5v dual-supply operation n t r ansparent latc h allo ws microprocessor interface with 30ns setup time n data flow-through mode n v oltage reference output ml2340 ........................................... 2.25v or 4.50v ML2350 ........................................... 2.50v or 5.00v n nonlinearity .................................... 1 / 4 lsb or 1 / 2 lsb n output voltage settling time over temperature and supply voltage tolerance w ithin 1v of v cc and a gnd ................... 2.5s max w ithin 100mv of v cc and a gnd ............... 5s max n ttl and cmos compatible digital inputs n low supply current (5v supply) ..................... 5ma max n 18-pin dip or surface mount solc block diagram op amp resist ors switches decoders 8-bit d/a d a t a la tch v ref v refout v refin dgnd v zs v cc agnd C + v out db0 (lsb) db7 (msb) xfer gain 0 gain 1 * t his p art is obsolete ** this part is end of life as of august 1, 2000 http:///
ml2340, ML2350 2 pin name function p i n name function 1v cc p ositi v e supply . 2v out v oltage output of the d/a con v erter . v out is referenced to v zs . 3v zs zero scale v oltage. v out is referenced to v zs . v zs is normally tied to a gnd in the unipolar mode or to mid-supply in the bipolar mode. when the device is operated from a single power supply , v zs has a maximum current requirement of C300a in the bipolar mode. 4 agnd analog ground. 5 dgnd digital ground. this is the ground reference level for all digital inputs. t he r ange is a gnd - dgnd - v cc C 4.5v . dgnd is normally tied to system ground. 6 db0 data input bit 0 (lsb). 7 db1 data input bit 1. pin description 8 db2 data input bit 2. 9 db3 data input bit 3. 1 0 db4 data input bit 4. 1 1 db5 data input bit 5. 1 2 db6 data input bit 6. 1 3 db7 data input bit 7 (msb). 1 4 xfer t r ansfer enable input. t he data is transferred into the transparent latch at the high level of xfer. 1 5 gain 0 digital gain setting input 0. 1 6 gain 1 digital gain setting input 1. 17 v ref out v oltage reference output. v ref out is referenced to a gnd . v ref out is set to 2.5v and 5.0v in a low-voltage and high-voltage operation, respectively for the ML2350; 2.25v and 4.5v for the ml2340. 18 v ref in v oltage reference input. v ref in is referenced to a gnd . pin connections v cc v out v zs a gnd dgnd db0 db1 db2 db3 v ref in v ref out gain 1 gain 0 xfer db7 db6 db5 db4 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 top view top view v cc v out v zs a gnd dgnd db0 db1 db2 db3 v ref in v ref out gain 1 gain 0 xfer db7 db6 db5 db4 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 ml2340 ML2350 18-pin dip (p18) ml2340 ML2350 18-pin soic (s18w) http:///
ml2340, ML2350 3 absolute maximum ra tings absolute maximum ratings are those values beyond which the device could be permanently damaged. absolute maximum ratings are stress ratings only and functional device operation is not implied. supply v oltage v cc with respect to a gnd ............ 14.2v dgnd ............................................ C0.3v to v cc + 0.3v v zs , v ref in ................................................ C0.3v to v cc + 0.3v logic inputs .................................... C0.3v to v cc + 0.3v input current per pin ............................................ 25ma stor age t emper ature .............................. C65c to +150c p a c kage dissipation at t a = 25c (board mount) . . . 875mw lead t emper ature (soldering 10 sec.) dual-in-line package (molded) .......................... 260c dual-in-line package (ceramic) ......................... 300c molded small outline ic package v apor phase (60 sec.) ..................................... 215c infrared (15 sec.) ............................................ 220c electrical characteristics unless otherwise specified, t a = oper ating temper ature range, v cc C a gnd = 5v 10% and 12v 10%, v ref in for ml2340 = 2.25v and 4.50v , for ML2350 v ref in = 2.50v and 5.00v , v out load is r l = 1k w and c l = 100pf , v ref load is r l = 1k w and c l = 100pf and input control signals with t r = t f - 20ns. (note 1) ml2340xcx, ML2350xcx ML2350xix parameter notes conditions min typ max min typ max units converter and programmable gain amplifier converter resolution 8 8 bits integral linearity error gain = 2, 1, 1 / 2 , or 1 / 4 ml2340bxx, ML2350bxx 1 / 4 1 / 4 lsb ml2340cxx, ML2350cxx 1 / 2 1 / 2 lsb differential linearity error gain = 2, 1, 1 / 2 , or 1 / 4 ml2340bxx, ML2350bxx 1 / 4 1 / 4 lsb ml2340cxx, ML2350cxx 1 / 2 1 / 2 lsb mode select v zs with respect to agnd unipolar output 0 1.0 0 1.0 v bipolar output 1.50 v cc C2.25 1.50 v cc C2.25 v offset error figure 1 unipolar mode gain = 1 / 4 , 1 / 2 , 1 10 12 mv gain = 2 20 24 mv bipolar mode figure 1 gain = 1 / 4 , 1 / 2 , 1, 2 10 plus 10 plus mv 2 1 / 2 lsb 2 1 / 2 lsb gain error figure 1 unipolar mode gain = 1 / 4 , 1 / 2 , 1, 2 0.5 2 0.5 2.5 %fs bipolar mode gain = 1 / 4 , 1 / 2 , 1, 2 0.5 2 0.5 2.5 %fs opera ting conditions supply v oltage, v cc .......................... 4.5v dc to 13.2v dc t emper ature range ML2350bij .......................................... C40c to +85c ml2340bcp , ml2340ccp ML2350bcp , ML2350ccp ml2340bcs, ml2340ccs ML2350bcs, ML2350ccs ..................... 0c to +70c http:///
ml2340, ML2350 4 electrical characteristics (continued) ml2340xcx, ML2350xcx ML2350xix parameter notes conditions m i n t y p m a x m i n t y p m a x units reference v ref out voltage ml2340bxx v cc - 7.0v t a = 25c 2.23 2.25 2.27 2.23 2.25 2.27 v t min to t max 2.22 2.28 2.18 2.32 v v cc ? 8.0v t a = 25c 4.48 4.50 4.52 4.48 4.50 4.52 v t min to t max 4.46 4.54 4.43 4.57 v ml2340cxx v cc - 7.0v t a = 25c 2.22 2.25 2.29 2.22 2.25 2.28 v t min to t max 2.20 2.30 2.18 2.32 v v cc ? 8.0v t a = 25c 4.45 4.50 4.55 4.45 4.50 4.55 v t min to t max 4.40 4.60 4.35 4.65 v ML2350bxx v cc - 7.0v t a = 25c 2.48 2.50 2.52 2.48 2.50 2.52 v t min to t max 2.47 2.53 2.43 2.57 v v cc ? 8.0v t a = 25c 4.98 5.00 5.02 4.98 5.00 5.02 v t min to t max 4.96 5.04 4.90 5.10 v ML2350cxx v cc - 7.0v t a = 25c 2.45 2.50 2.55 2.46 2.50 2.55 v t min to t max 2.44 2.58 2.42 2.59 v v cc ? 8.0v t a = 25c 4.95 5.00 5.05 4.95 5.00 5.05 v t min to t max 4.90 5.10 4.85 5.15 v temperature coefficient v ref out 5 0 5 0 ppm/c v ref output current 0.75 5 0.75 5 m a v ref out power supply 100mv pCp , 1khz C40 C60 C40 C60 db rejection ratio sinewave on v cc v ref in and v zs v ref in input range v cc - 8.75v agnd+2 v cc C1.75 agnd+2 v cc C1.75 v v cc ? 8.75v agnd+2 agnd+7 agnd+2 agnd+7 v v ref in dc input 10 10 m y resistance v zs voltage range 2 v cc - 7.0v agnd v cc C2.25 agnd v cc C2.25 v analog output v out output swing unipolar mode 2 r l = 100k w agnd+ v cc C0.5 agnd+ v cc C0.5 v 0.01 0.01 r l = 1k w agnd+ v cc C1.0 agnd+ v cc C1.0 v 1.0 1.0 bipolar mode r l = 100k w agnd+ v cc C0.1 agnd+ v cc C0.1 v 0.1 0.1 r l = 1k w agnd + v cc C1.0 agnd + v cc C1.0 v 1.0 1.0 v out output current agnd+1v ml2340, ML2350 5 electrical characteristics (continued) ml2340xcx, ML2350xcx ML2350xix parameter notes conditions min typ max min typ max units digital and dc v in(0) logical 0 0.8 0.8 v input voltage v in(1) logical 1 2.0 2.0 v input voltage i in(0) logical 0 v in = dgnd C1 C1 a input current i in(1) logical 1 v in = v cc 11a input current supply current, bipolar mode i cc , v cc current v cc = 5v 10% 5.3 5.3 m a i agnd , analog ground current C5.0 C5.0 ma i vzs , v zs current C90 C300 C90 C300 a i cc , v cc current v cc = 12v 10% 9.3 9.3 m a i agnd , analog ground current C9.0 C9.0 ma i vzs , v zs current C90 C300 C90 C300 a supply current, unipolar mode i cc , v cc current 3 v cc = 5v 10% 6.0 6.0 m a i agnd , analog ground current C4.3 C4.3 m a i vzs , v zs current C1.7 C1.7 ma i cc , v cc current v cc = 12v 10% 11.0 11.0 m a i agnd , analog ground current 3 C7.3 C7.3 m a i vzs , v zs current C3.7 C3.7 ma ac performance settling time figure 2, t s1 output step of agnd + 1v 1.2 2.5 1.2 3.0 s to v cc C 1v, r l = 1k w t s2 output step of 2.5 5 2.5 6 s agnd + 100mv to v cc C 100mv, r l = 100k w t s3 output step of 1lsb 1 1 s t s4 , gain change change of any gain setting 1.1 2.5 1.1 s t xfer , xfer pulse width figure 3 6 0 6 0 n s t dbs , db0Cdb7 figure 3 40 45 ns setup time t dbh , db0Cdb7 figure 3 0 0 ns hold time t reset , power-on 16 16 s reset time note 1: limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions. note 2: supply current and analog ground current are specified with the digital inputs stable and no load on v out . note 3: in unipolar operation with v zs and agnd tied together, digital codes that represent an analog value of less than 100mv from agnd should be avoided. http:///
ml2340, ML2350 6 analog output digital input offset (zero) error ideal ideal with offset gain error a ctu al offset error analog output digital input ideal gain error ideal with offset actual unipolar mode unipolar mode figure 1. gain and offset error valid data t dbs t dbh t wr xfer db0Cdb7 figure 3. single buffered mode t s4 t s1 , t s2 , t s3 settled to 1/2 lsb v out xfer gain 0, gain 1 f igure 2. settling t ime http:///
ml2340, ML2350 7 1.0 functional description 1.1 d/a converter the d/a converter is implemented using an array of equal current sources that are decoded semi-linearly for the four most significant bits to improve differential linearity and to reduce output glitch around major carries. see figure 4. the input voltage reference of the d/a converter is the difference between v ref in and a gnd . t his difference voltage is converted to a reference current using an internal resistor to set up the appropriate current level in figure 4. d/a converter implementation 4i 4i 4i 2i i i 4-bit divider dac out da c out v cc 1.2 single-suppl y vs. dual-suppl y opera tion ml2340 and ML2350 can be powered from a single supply ranging from 4.5v to 13.2v or dual supplies r anging from 2.25v to 6.6v . t he internal digital and analog cir cuitry is powered between v cc and a gnd . t he r ange of dgnd is agnd - dgnd - v cc C 4.5v with the logic thresholds set between 0.8v and 2.0v above dgnd (standard ttl logic lev el). t he r ange of v zs is a gnd - v zs - (v cc C 2.25v). 1.3 unipolar and bipolar output v o l t a ge swing ml2340 and ML2350 can operate in either unipolar or bipolar output voltage mode. unipolar/bipolar mode selection is determined by comparing the zero scale voltage (v zs ) of these devices to a precise internal reference that is referred to a gnd . v zs is ideally the voltage that will be produced at the dac voltage output w hen the digital input data is set to all 0 s unipolar mode is selected when v zs is lower than 1.00 volt, and bipolar mode is selected when v zs is greater than 1.50 volts. 1.3.1 unipolar output mode in the unipolar mode, v out swings above v zs . ideally the 00000000 code results in an output voltage of v zs , and the 11111111 code results in an output v oltage of v fs x 255/256, where v fs is the full-scale voltage determined by v ref in and the gain setting. 1.3.2 bipolar output mode in the bipolar mode, v out swings around v zs . the input data is in 2 s complement binary format. ideally , the 00000000 code results in an output voltage of v zs ; the 10000000 code results in an output voltage of (v zs C v fs ); and the 01111111 results in an output v oltage of (v zs + v fs 127/128), where v fs is the full scale output voltage determined by v ref in and the gain setting. 1.4 output buffer and gain setting the output buffer converts the d/a output current to a voltage output using a resistive network with proper gain setting determined by the gain 0 and gain 1 inputs. there are four possible gain settings for unipolar output voltage mode and bipolar output voltage mode as listed below: unipolar output voltage mode voltage output swing gain 1 gain 0 gain relative to v zs 00 1 / 4 v ref in 1 / 4 01 1 / 2 v ref in 1 / 2 101 v ref in 1 112 v ref in 2 the d/a con v erter . t he d/a con v erter output current is then converted to a voltage output by an output buffer and a resistive network. the matching among the on-chip resistors preserves the gain accuracy between these conversions. the d/a converter can be used in a multiplying mode by modulating the reference input within the specified v ref in range. http:///
ml2340, ML2350 8 bipolar output v oltage mode gain 1 gain 0 gain v oltage output p-p 00 1 / 4 v ref in 1 / 8 01 1 / 2 v ref in 1 / 4 101 v ref in 1 / 2 112 v ref in 1 t he output buffer can sour ce or sink as muc h as 10ma of current with an output voltage of at least 1v from either v cc or a gnd . as the output v o ltage approac hes v cc or a gnd the current sour cing/sinking capability of the output buffer is reduced. the output buffer can still swing d o wn to within 10mv of a gnd and up to within 40mv of v cc with a 100k w load at v out to a gnd in the unipolar operation. in the bipolar operation, the output buffer swing is limited to about 100mv from either rails. 1.5 v o l t a ge reference a bandgap voltage reference is incorporated on the ml2340 and ML2350. t w o reference v oltages can be produced b y eac h device. an internal compar ator monitors the po wer supply voltage to determine the selection of the reference v oltage. a reference v oltage of 2.25 v olts on the ml2340 and 2.50 volts on the ML2350 is selected when the supply voltage is less than approximately 7.50 volts. otherwise, a reference v oltage of 4.50 v olts and 5.00 v olts is selected. t o prevent the comparator from oscillating between the two selections, avoid operation with a power supply between 70 and 8.0 volts. t he bandgap reference is trimmed for zero t emperature coefficient (tc) at 35c to minimize output voltage drift over the specified operating temperature range. the internal reference is buffered for use by the dac and external cir cuits. t he reference buffer will source more than 5ma of current and sink more than 1ma of current. w ith v ref in connected to v ref out , the follo wing output voltage ranges of the dac are obtained: ml2340 v ref = 2.25v with v ref = 4.5v with gain v cc - 7.0v v cc ? 8.0v setting unipolar bipolar unipolar bipolar 1 / 4 0 to 0.562v C0.281v to 0 to 1.125v C0.562v to +0.281v +0.562v 1 / 2 0 to 1.125v C0.562v to 0 to 2.250v C1.125v to +0.562v +1.125v 1 0 to 2.250v C1.125v to 0 to 4.500v C2.250v to +1.125v +2.250v 2 0 to 4.500v C2.250v to 0 to 9.000v C4.500v to +2.250v +4.500v ML2350 v ref = 2.50v with v ref = 5.0v with gain v cc - 7.0v v cc ? 8.0v setting unipolar bipolar unipolar bipolar 1 / 4 0 to 0.625v C0.3125v to 0 to 1.25v C0.625v to +0.3125v +0.625v 1 / 2 0 to 1.250v C0.6250v to 0 to 2.50v C1.250v to +0.6250v +1.250v 1 0 to 2.500v C1.2500v to 0 to 5.00v C2.500v to +1.2500v +2.500v 2 0 to 5.000v C2.5000v to 0 to 10.00v C5.000v to +2.5000v +5.000v an external reference can alternatively be used on v ref in to set the desired full scale voltage. the linearity of the d/a conv erter depends on the reference used, howev e r . t o insure integral linearity at an 8-bit level, a reference voltage of no less than 2v and no more than 7v (2.75v for operation with a low-voltage power supply) should be used. 1.6 digit al interf a c e the digital interface of the ml2340 and ML2350 consist of a transfer input (xfer) and eight data inputs, db0 through db7. the digital interface operates in one of the two modes: 1.6.1 single-buffered mode digital input data on db0Cdb7 is passed through an 8-bit transparent input latch on the rising edge of xfer. because the outputs of the latch are connected directly to the inputs of the internal dac, changes on the digital data while the xfer input is still active will cause an immediate c hange in the d a c output v oltage. t o hold the input data on the latch, the xfer input needs deactivated while the data is still stable. 1.6.2 flow-through mode in the flow-through mode, the input latch is bypassed. when xfer is set to logic 1, a change of data inputs, db0Cdb7, results in an immediate update of the output voltage. 1.7 power-on-reset t he ml2340 and ML2350 ha v e an internal po wer -on- reset cir cuit to initialize the device w hen po wer is first applied to the device. t he power -on-reset interv al of typically 8s begins when the supply voltage, v cc reaches approximately 2.0v . during the po wer -on-reset interv al, the tr ansparent latc h is reset to all 0 s. http:///
ml2340, ML2350 9 2.0 typic al applic a tions +v ref v refout v refin ml2340 d/a with reference v out m p 4.5v 0 v in 4.5v ml2271 figure 5. using 4.50v reference of d/a for reference of a/d using single 5v v cc 10% data v in v out address decode d7 d0 int den hen tms320 /e14 c15 pa0 pa1 pa2 clock source or timer cs wr rd int db0 db7 ml2261 ml2340 d/a db0 db7 xfer figure 6. tms320 interface +5v v cc v out v refin v refout v zs agnd gain 0 gain 1 2.50v unipolar v out 0 t o 5v 256 codes 5.0v C 100mv 2.5v 256 codes 256 codes 1.25v 256 codes 0.625v gnd gnd gnd gnd v out , gain 2 v out , gain 1 v out , gain 1/2 v out , gain 1/4 ML2350 f i gure 7. single 5v supply unipolar v out http:///
ml2340, ML2350 10 +12v v cc v out v refin v refout v zs agnd gain 0 gain 1 4.50v bipolar v out around 4.5v 256 codes 9.0v 6.75v 256 codes 256 codes 5.625v 256 codes 5.062v 3.938v 3.375v 2.25v gnd + 100mv v out , gain 2 v out , gain 1 v out , gain 1/2 v out , gain 1/4 ml2340 4.5v 4.5v 4.5v 4.5v typic al applic a tions (continued) f igure 8. single 12v supply , bipolar v out with 11-bits resolution around 4.5v figure 9. hard disc drive servo coil driver providing 13-bit effective resolution micro- controller 17 18 19 5 1 20 6 3 15 3 5 6 14 4 1 20 16 2 2 ml2340 v cc v ref out v ref in v zs v out a gnd dgnd gain 1 gain 0 db7 db0 xfer 0.1 m f 0.1 m f +12v +12v ref control+ controlC disable gnd po werf ail retra ct high/lo w i(ret) set v(ret) pwr gnd b outputC r sense pwr gnd a output+ pwr vc +5v ml4406 +5v +12v 19 11 10 13 8 12 1 w servo coil 9 from motor windings 7 4 r(ret) http:///
ml2340, ML2350 11 physical dimensions inches (millimeters) seating plane 0.240 - 0.260 (6.09 - 6.61) pin 1 id 0.295 - 0.325 (7.49 - 8.26) 0.890 - 0.910 (22.60 - 23.12) 0.016 - 0.022 (0.40 - 0.56) 0.100 bsc (2.54 bsc) 0.008 - 0.012 (0.20 - 0.31) 0.015 min (0.38 min) 18 0o - 15o 1 0.050 - 0.065 (1.27 - 1.65) 0.170 max (4.32 max) 0.125 min (3.18 min) 0.045 min (1.14 min) (4 places) package: p18 18-pin pdip seating plane 0.291 - 0.301 (7.39 - 7.65) pin 1 id 0.398 - 0.412 (10.11 - 10.47) 0.449 - 0.463 (11.40 - 11.76) 0.012 - 0.020 (0.30 - 0.51) 0.050 bsc (1.27 bsc) 0.022 - 0.042 (0.56 - 1.07) 0.095 - 0.107 (2.41 - 2.72) 0.005 - 0.013 (0.13 - 0.33) 0.090 - 0.094 (2.28 - 2.39) 18 0.009 - 0.013 (0.22 - 0.33) 0o - 8o 1 0.024 - 0.034 (0.61 - 0.86) (4 places) package: s18 18-pin soic http:///
ml2340, ML2350 12 micro linear reserv es the right to make c hanges to an y product herein to improv e reliability , function or design. micro linear does not assume any liability arising out of the application or use of any product described herein, neither does it con vey an y license under its patent right nor the rights of others. t he cir cuits contained in this data sheet are offered as possible applications only . micro linear makes no w arranties or representations as to w hether the illustr ated circuits infringe an y intellectual property rights of others, and will accept no responsibility or liability for use of an y application herein. t he customer is urged to consult with appropriate legal counsel before deciding on a particular application. ds2340_50-01 2092 concourse drive san jose, ca 95131 t el: 408/433-5200 fax: 408/432-0295 ordering informa tion integral & differential temperature part number non-linearity range package v ref out = 2.25v with v cc = 5v ml2340ccp/5 (obs) 1/2 lsb 0c to 70c molded dip (p18) ml2340ccs/5 (obs) 0c to 70c molded soic (s18) v ref out = 2.50v with v cc = 5v ML2350ccp/5 (obs) 1/2 lsb 0c to 70c molded dip (p18) ML2350ccs/5 (eol) 0c to 70c molded soic (s18) ML2350cis/5 (eol) C40c to 85c molded soic (s18) v ref out = 4.50v with v cc = 12v ml2340ccp/12 (obs) 1/2 lsb 0c to 70c molded dip (p18) ml2340ccs/12 (obs) 0c to 70c molded soic (s18) v ref out = 5.00v with v cc = 12v ML2350ccp/12 (obs) 1/2 lsb 0c to 70c molded dip (p18) ML2350ccs/12 (obs) 0c to 70c molded soic (s18) ML2350cis/12 (obs) C40c to 85c molded soic (s18) ? micro linear 1997 is a registered trademark of micro linear corporation products described in this document may be covered by one or more of the following patents, u.s.: 4,897,611; 4,964,026; 5,027,1 16; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; japan: 2598946; 2619299. other patents are pending. http:///

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